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- Path: nntp.teleport.com!sschaem
- From: sschaem@teleport.com (Stephan Schaem)
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: One hardware-basher's manifesto
- Date: 2 Mar 1996 05:30:29 GMT
- Organization: Teleport - Portland's Public Access (503) 220-1016
- Message-ID: <4h8mdl$599@maureen.teleport.com>
- References: <4ge8na$vhe@ar.ar.com.au> <08000305729070351637@BIRDLAND> <4guenp$1a1@vixen.cso.uiuc.edu> <4h51kg$cio@maureen.teleport.com> <4h59q5$hvl@maureen.teleport.com> <4h5e0h$iae@vixen.cso.uiuc.edu>
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-
- Saladino Michael D (msaladin@students.uiuc.edu) wrote:
- : sschaem@teleport.com (Stephan Schaem) writes:
-
- : >: You do not ALWAYS access ram linearly... Drawing a vertical line in 32bit
- : >: color only accessing ram linearly?
-
- : >: .. move.l d0,(a0)
- : >: adda.l a1,a0
- : >: dbra d0,..
-
- : > What I really wanted to show (above is a bad example) is that GFX
- : > function can pretty much access ram 'randomly' for writes & READS.
-
- : > The 'worse' case senario is free direction texture mapping.
-
- : Aren't we thinking one-dimensionally today? What about the next line
- : drawn next to it. Could be entirely cache hits. And the one after
- : that? You know modern day caches are many K in size and can hold
- : quite a bit. In case you aren't understanding me, let's say you
- : want to fill a square with, oh let's say green. And just because
- : you like a challenge, you fill it vertically. The first line drawn
- : will give you nothing but misses, assuming the cache is initially
- : empty. However, it's that second one... that's the ticket. It could
- : be nothing but cache hits depending on the size and mapping of the
- : cache. And guess what, same goes for the third and forth line.
- : Now, this argument doesn't work well for some sad little 256 byte
- : cache (020s take a step back). Hell, even a 4K will only give you
- : a benifit for small polygons, but it could be there. And that's my
- : point. Yes, graphic routines can appear very random at times, but
- : given a large enough cache (ever see what modern day processors are
- : comin' with), you can use them to your advantage. So, many of your
- : points are valid on little sad chips that were designed years or even
- : a decade ago, but on today's stuff, it doesn't hold true.
-
- Well those 'litle sad chips' is what the amiga is using....
-
- : And, as for free direction texture mapping being the worse case, it
- : ain't. The problem is caused by the size of the line and how it maps
- : into the cache. You could draw a line that appears quite random, but
- : the second line drawn might hit every single pixel due to this same
- : randomness and how it mapped into the cache.
-
- And aren't we speaking to little bit to fast today?
-
- I suggest you get an 030 user manual and read about the 030 data cache
- (the organazition should be the same on 040 and 060, but more cache line)
- then you can learn how a cache miss occure.... let me just say that
- bit 4 to 7 on the 030 is the index in the cache table.
-
- If you can run the example of a constantz innerloop and its affect on
- the cache with say a 320x200 screen and 256x256 tmap. Just check the
- a0 and a1 adress and how they cause cache misses because they share
- the same index but not the same tag.
-
- The more you know about the cache the best you can use it. you can
- optmize code to fit better on the 020 cache for example.
-
- anyway,
-
- Stephan
-
-